This present invention relates to chip mounting techniques for display apparatus and more particularly to improved techniques for mounting driver chips and the like to monolithic flat panel display apparatus resulting therefrom.
Recent advances in the construction of monolithic flat panel display apparatus, as disclosed for example in U.S. application Ser. No. 905,570, now U.S. Pat. No. 4,772,820 and entitled MONOLITHIC FLAT PANEL DISPLAY APPARATUS AND METHODS FOR FABRICATION THEREOF, filed on Sep. 11, 1986 in the names of Frank J. DiSento, Sr. and Denis A. Krusos, and assigned to the assignee hereof, have resulted in a simplification in the fabrication and structure of monolithic flat panel display apparatus such as electrophoretic display panels. Thus, according to the teachings of that patent application, methods for fabricating monolithic flat panel displays are disclosed, together with the resulting display, wherein the end portions of the row and column conductors of the display panel are metalized, grouped and patterned to accept a driver circuit within the pattern of each group. The driver circuit is then bonded to the panel and each input to and output from the driver circuit to be employed is wire bonded to the patterned conductor portions within the group associated therewith.
This provides an integral one piece panel structure and wholly avoids a need for the separate carrier board structure previously utilized. This carrier board structure is described, for instance, in U.S. Pat. No. 4,598,960, entitled METHODS AND APPARATUS FOR CONNECTING CLOSELY SPACED LARGE CONDUCTOR ARRAYS EMPLOYING MULTICONDUCTOR CARRIER BOARDS, which issued on Jul. 8, 1986 to Frank J. DiSento, Sr. and Denis A. Krusos and is commonly assigned. These carrier boards were utilized to provide a mounting configuration for each of the large number of driver circuits relied upon in an electrophoretic display panel and more particularly to provide coupling between the outputs of these driver circuits and the larger number of row and column conductors within an electrophoretic display panel. Additionally, connections to the inputs for each of the driver circuits were also provided by the carrier boards.
Avoiding the need for carrier boards represented a marked improvement in the resulting structure of the electrophoretic display panel since a mechanical sandwiching of carrier boards having driver circuits about the periphery of the display panel was no longer required. Further, marked improvements in reliability resulted because the mechanical interconnection of the inputs and outputs of the driver circuits were replaced with highly reliable and relatively easily implemented wire bonding techniques. Thus, fabrication costs and complexity were markedly reduced while the reliability of the resulting display was enhanced.
In U.S. Pat. No. 4,655,897 (Ser. No. 07/670,571) entitled ELECTROPHORETIC DISPLAY PANELS AND ASSOCIATED METHODS, as filed on Nov. 13, 1984; U.S. application Ser. No. 07/799,458 entitled ELECTROPHORETIC DISPLAY PANEL APPARATUS AND METHODS THEREFOR, as filed on Nov. 19, 1985, now U.S. Pat. No. 4,742,345; and in U.S. application Ser. No. 06/905,570, entitled MONOLITHIC FLAT PANEL DISPLAY APPARATUS AND METHODS FOR FABRICATION THEREFORE, now U.S. Pat. No. 4,772,820, as aforesaid, electrophoretic displays having an 81/2 by 11 inch display area exhibiting a resolution of 200 lines per inch are disclosed. In such displays, 2200 horizontally disposed row or cathode conductors and 1700 vertically disposed column or grid conductors are utilized to achieve the requisite 200 line per inch resolution. When the display is configured in the manner described in U.S. application Ser. No. 06/905,570 entitled MONOLITHIC FLAT PANEL DISPLAY APPARATUS AND METHODS FOR FABRICATION THEREOF, now U.S. Pat. No. 4,722,820 each group of 64 row and column conductors are metalized and patterned to accept a driver circuit within the pattern of each group.
The driver circuit is then bonded to the panel and each output to the driver circuit is wire bonded to the patterned conductor portions within the group associated therewith. Inputs peripherally disposed at the edge of the electrophoretic panel are also wire bonded to the individual driver circuits. Hence, under these conditions 35 individual driver circuits are employed for the 2200 row or cathode conductors while 27 driver chips are utilized for the 1700 vertically disposed column or grid conductors wherein the row driver chips are disposed in a column direction and conversely the column driver chips are disposed in a row direction. In this regard it may also be noted that while an exemplary resolution of 200 lines per inch has been discussed, substantially greater resolution is available at this time.
Once the entire conductor structure for the monolithic flat panel display apparatus described in U.S. Ser. No. 905,570, now U.S. Pat. No. 4,772,820, as aforesaid, has been formed, the conductors described are grouped, patterned and metalized such that each group of 64 conductors have their individual conductors disposed about and contiguous to 3 sides of a rectangular area where the conductor portions proximate thereto are metalized so that connection through wire bonding techniques may be employed. In addition, the remaining side of the rectangular open area within each pattern formed is proximate to the peripherally disposed input conductors provided for each group of row and column drivers.
At this juncture, a conventional chip mounting machine is employed to precisely dispose each driver chip within the rectangular area provided within each pattern and a small spot of low temperature thermal setting epoxy or similar adhesive is placed on the bottom of each chip so that the same may be mounted by the chip mounting machine within the rectangular area provided. Once all of the row and column driver chips are properly positioned in their requisite locations, the entire panel is placed in an oven set at a temperature of approximately 120.degree. C. for approximately two hours to allow the epoxy bond formed intermediate the bottom surface of the row or column driver chips and the glass display panel to cure. After this has been completed, actual connection of each of the 64 row or column conductors in a group is made to each of the 64 outputs of the row or column driver chip and each of 10 inputs at the rear of the chip is connected to associated input/output drive lines on the display. This is done through the use of a conventional wire bonding machine.
Once the panel is thus formed, the anode structure, which may take the form of a sheet of glass having a thin conductive layer of indium tin oxide (ITO) disposed thereon, is sealed over appropriate portions of the display panel being formed so that the entire display area of the completed panel is sealed. Thereafter, electrophoretic dispersion materials which basically take the form of pigment particles dispersed within a suitable solvent, as disclosed for instance in U.S. Pat. Nos. 4,655,897 and 4,742,345, (application Ser. No. 670,571 and application Ser. No. 799,458), respectively, as aforesaid, are disposed within the space between the anode and grid/cathode structure. The fill holes are then sealed to complete the panel assembly.
Once completed, the electrophoretic display panel formed may be mounted within a suitable housing, tested for reliability and then mounted within an appropriate product. As a large number of driver circuits are employed for driving the 3900 row and column conductors present, it is not infrequent that in testing an assembled panel it is noted that selected row or column conductors are not appropriately energized. Defects of this type are almost always attributable to a defective driver circuit. This occurs despite preliminary testing of the driver circuit prior to its mounting in the monolithic flat panel display being formed.
The integrated driver circuits are the most expensive components on the panel, correction of the defect, rather than a discarding of the panel formed, is the desired remedy. However, while it is relatively easy to locate the defective IC driver since it is directly associated with a group wherein one or more row or column conductors will not energize, replacement of the defective drive circuit within an already assembled array represents a difficult task.
More particularly, it will be recalled that in the fabrication techniques discussed, each driver circuit was provided with a spot of low temperature thermal setting epoxy or similar adhesive and placed directly on the glass panel at the selected and patterned location associated with the group of conductors which were to be driven. Once all of the driver chips were appropriately placed on the panel being formed, the panel was placed in an oven set at a temperature of approximately 120.degree. C. for approximately 2 hours to allow the epoxy bond formed intermediate the bottom surface of the driver chip and the display panel to cure. Once this was completed, connection of each of the inputs and outputs thereof to appropriate conductors within the array was implemented through the use of a conventional wire bonding machine. This is not only a time consuming procedure but in addition, once the entire display has been finished by the addition of electrophoretic material and the sealing of an anode thereto, the step of placing the same within an oven to be baked is generally unavailable. This occurs since the solvents employed for the electrophoretic material will tend to vaporize during baking causing the assembled panel to leak, crack or in other ways become defective. Thus, while it is relatively easy to sever the wire bond connections to a particular chip and thereafter fracture or break the bond formed by the single spot of epoxy or other adhesive employed, mounting a new driver chip becomes quite difficult as thermal curing of the same is unavailable due to the presence of the solvents utilized in the electrophoretic dispersion now present within the display panel formed.
Therefore, it is a principal object of the present invention to provide improved techniques for mounting driver chips in flat panel display apparatus.
A further object of this invention is to provide electrophoretic display apparatus and methods for the fabrication of the same wherein row and column driver circuits are bonded to the display panel through optical techniques.
An additional object of the present invention is to provide driver circuit mounting techniques for display apparatus wherein the bonding techniques employed may be utilized once a completed display has been formed.
Various other objects and advantages of the present invention shall become clear from the following detailed description of an exemplary embodiment thereof and the novel features will be particularly pointed out in conjunction with the claims appended hereto.